What is the best methodology to design different op-amps in nanometer technologies?

What is the best methodology to design different op-amps in nanometer technologies? by Khaled Alashmouny

Answer by Khaled Alashmouny:

I would break this question to multiple pieces and try to answer each piece.

1) Is the design methodology for opamps (or say analog circuits) that people used in deep-sub-um technologies any different than what people should use in latest nm technologies?

A:

Not really. The physics did not change and the back-of-envelop calculations won’t change either. You will still consider second-order effects the same way you used to do it before.

In recent technologies you have more complex effects due to layout and technology restrictions, but it is very hard to use hand calculations for them. So, you would still understand their root cause, but you would rely on the foundry providing accurate model for these effects.

2) What are the challenges for analog (or opamp) design in these deep technologies?

A:

There are some challenges and limitations due to the technology itself. This includes the layout-dependent effects mentioned before, the discrete dimensions designers should use, the poor intrinsic gain as you move from one technology to another, the limitations on the supply range you can use if your design requires high-voltage .. and so on. One key here is to make sure that you know exactly the region covered by your models and to be extra careful if your innovation is based on biasing devices in regions not covered by the model. While you can see the simulation results working, you will never get the performance if the model does not support your use case.

Another type of challenges is due to the fact that your opamp is in a nm technology for a reason. It won’t scale much in area is its fellow digital blocks. In this case, since the chip is almost dominant by digital circuits then you want to make sure the integration does not cause failure to your analog design. There can be further restrictions on the supply, extra guard-rings needed to isolate from digital noise, and many others that can be discovered when you work on full-chip solutions.

3) What methodology should you use?

A:

Again, it is not really different from before. You should understand the limitations of models, the limitations of device choices, do the most simple and intuitive method for hand calculation, understand the devices limitations and try to do some characterization for each device in simulation by itself to get parameters such as gm/Id vs. Id, Ids vs. Vgs and Vds, and other simple relations with different device geometries. Understand when saturation occurs per device width. Check the definition of threshold voltage according to the foundry … etc. Extract the parameters to use them in your hand calculations to get the most accuracy out of it. Once you feel you are comfortable with your knowledge about the technology go ahead and do a simple design, say a differential amplifier. Try cascoding and see what gain do you gain out of it. See if this matches your previous device characterization for output impedance and intrinsic gain.

Finally, go ahead and do your design in small steps to understand how each piece work, then assemble parts together and run simulations. It will match your intuition and your understanding of physics and you will know at which direction you need to tweak current, device size, loading …etc

You are not done yet, you still have to check how PVT variations affects you. Later to make your design robust you need to consider reliability and aging effects.

This answer is not complete and it is not meant to be complete. Analog design comes from the understanding of basics and the amount of experience you build from different design and from always thinking about why or why not it may work. So, don’t be overwhelmed. Just get started and build strong basic and intuition. You will get there.

What is the best methodology to design different op-amps in nanometer technologies?


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